Newsletter

Green SupplyLine  >  Design Center  >  Technology

Intelligent Interleaving: improving energy efficiency in AC-DC power supplies



Page 1 of 5

Green SupplyLine

At APEC 2009, held in Washington DC recently, Fairchild Semiconductor unveiled the FAN9612 Interleaved Dual Boundary Conduction Mode (BCM) Power Factor Correction (PFC) controller. The FAN9612 introduces several innovative, distinguishing functions aimed at maximizing performance, reducing external components and offering a robust set of protection features while increasing efficiency.

Interleaving is a special case of paralleling where a unique phase relationship exists between two or more power stages commonly referred to as phases or channels. In order to retain all the ripple current cancellation benefits from a two-stage design, it is imperative that each channel be synchronized 180 degrees out of phase with respect to the other. Since each channel is ideally designed to process 50% of the power, disrupting or losing synchronization, especially any time the load exceeds 50% of the maximum rated current can be catastrophic to the overall design. In other words, a synchronization algorithm lacking tight tolerance unnecessarily drives the need to over design the power stage. The FAN9612 uses a proprietary synchronization scheme known as Sync-Lock to assure near perfect, 180 degree synchronization during soft-start, soft-stop and under all transient and steady state operating conditions. If a failure mode results in one channel becoming inoperable, an internal restart timer is activated which effectively acts as a power limit, preventing the operating phase from trying to deliver full rated power. All the necessary synchronization and safety functions are completely handled by the FAN9612, eliminating the need to over-design the power stage resulting in a design highly optimized for efficiency, performance and reliability.

Start-up is a primary concern for any power supply design and PFC converters are no exception. The regulated output voltage set point for most PFC applications is in the range of 400V so any amount of voltage over-shoot, particularly during soft-start induces additional stress to the output bulk capacitor and switching components. The FAN9612 addresses two very important start-up related design issues. The first is the ability to maintain closed-loop soft-start during the entire start-up sequence. The figure below shows the functional implementation of the FAN9612 proprietary soft-start circuitry and simulated start-up sequence.


Closed-Loop Soft-Start Performance
Click on image to enlarge.


Page 2: Understanding PFC output  

Page 1 | 2 | 3 | 4 | 5

Related Links:
  • Achieving high power density in industrial power supplies
  • Electric motor efficiency depends upon power factor - Part 2
  • Electric motor efficiency depends upon power factor - Part 1


  • Rate this article
    WORSE | BETTER
    1 2 3 4 5




    Related Content

    TECH PAPER
    1. Power-supply design for high-speed ADCs

    TECH PAPER
    2. A New Type of DC/DC Module

    TECH PAPER
    3. Digital Signal Processing: A Practical Guide (Part 5)

    TECH PAPER
    4. Techniques for Lowering Power Consumption in Design Utilizing the Intel EP80579 Integrated Processor Product Line

     


    EE Times TechCareers
    Search Jobs

    Enter Keyword(s):


    Function:


    State:
      

    Post Your Resume
    -----------------
    Employers Area
    Most Recent Posts
    Accenture seeking Project Management Team Lead in Charlotte, NC

    Accenture seeking Software Engineer in Salt Lake City, UT

    Boeing Company seeking Software Engineer in Herndon, VA

    Switch and Data seeking Customer Solutions Engineer in Dallas, TX

    Chart Industries seeking Sr. Developer in Cleveland, OH

    More career-related news, resources and job postings for technology professionals

     Sponsor